Latency Hiding on COMA
نویسندگان
چکیده
Cache-only memory access (COMA) multiprocessors support scalable coherent shared memory with a uniform memory access programming model. The local portion of shared memory associated with a processor is organized as a cache. This cache-based organization of memory results in long remote memory access latencies. Latency-hiding mechanisms can reduce eeective remote memory access latency by making data present in a processor's local memory by the time the data are needed. In this paper we study the eeectiveness of latency-hiding mechanisms on the KSR2 multiprocessor in improving the performance of three programs. The communication patterns of each program are analyzed and the mechanisms for latency hiding are applied. Results from a 52-processor system indicate that these mechanisms hide a signiicant portion of the latency of remote memory accesses. The results also quantify beneets in overall application performance.
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